Integrated sensor devices may require an electric shield provided above lowly doped diffusion areas, such as piezoresistive elements, implemented in a silicon die to obtain a good sensor stability, for example to prevent modulation of such piezoresistors by surface charges. It is known in the art to place a shield on top of passivation layers that cover lowly doped diffusion areas, such as piezoresistors. Since the shield is placed over the stress-sensitive lowly doped diffusion area, e.g. over a stress sensitive resistor, the shield should not add significant stress to the lowly doped diffusion area, nor a stress that changes over time. This could, for example, cause an undesirable offset in the measurements obtained from the sensor, which offset could moreover vary during the lifetime of the sensor.
For example, the shield is preferably implemented in a material that does not show significant plastic deformation at the stress levels it is exposed to during its lifetime, e.g. a material that does not exhibit plastic deformation under changing pressures, since a sensor offset could otherwise undesirably change after varying the pressure.
In standard CMOS processing techniques known in the art, silicon-titanium (Si—Ti) alloys can be used for providing a good ohmic contact between a silicon material and a metal, such as aluminium, while simultaneously preventing diffusion of that metal into the silicon material. For example, titanium may be sputtered onto the silicon, followed by a heating of the layer to form a Si—Ti alloy that has a low ohmic resistance. The Ti layer may furthermore be exposed to nitrogen to form a titanium nitride (TiN) layer on top of the titanium. For example, during the titanium sputtering, e.g. halfway during the sputtering process, nitrogen can be introduced in the sputter chamber to incorporate nitrogen into the upper part of the titanium film. This TiN layer can form a diffusion barrier and can also provide a good adhesion to a metal that is deposited on top of the contacts.
Standard CMOS processing techniques often comprise a very simple process sequence to achieve this. For example, after opening the contacts, the following process sequence can be performed: sputtering a Ti layer and forming a TiN layer on top of the Ti layer, e.g. using the same tool, annealing to form titanium silicide (Ti—Si) contacts, sputtering an interconnect layer, such as an Al, Al—Si, Al—Cu or Al—Si—Cu interconnect layer, on top of the TiN layer, patterning a photo resist on the metal stack, e.g. in which the contacts are covered with resist, etching the metal stack including the interconnect layer, the TiN layer and the Ti layer, and stripping the resist.
This approach provides, advantageously, important features without adding further photolithographic steps, e.g. provides ohmic contacts, an adhesion layer and a diffusion barrier in an efficient standard CMOS process sequence. For example, FIG. 4 schematically shows a prior-art standard CMOS contact with a Ti—Si layer 101 for assuring a low ohmic contact to the silicon, e.g. to a (p or n) diffusion region 102 in a silicon substrate 103, e.g. an n-bulk silicon slab. Furthermore, a TiN layer 104 provides a diffusion barrier, while providing the electrical connection to an interconnect structure 105, e.g. a copper or aluminium interconnect. Furthermore, a passivation layer 106, e.g. a silicon oxide SiO2 layer that delineates the silicon contact area is shown.
Standard CMOS devices may be less suitable, e.g. may be unsuitable, for use in harsh media conditions, e.g. under exposure to sulfuric or fuming nitric acids or to iodine. For example, bondpad metals, such as aluminium or copper, may corrode, e.g. due to oxidation, when exposed to such chemicals. It is known in the art to cover the bondpads by a protective gold layer. However, a diffusion barrier may need to be provided in between the bondpad and the gold. For example, without a diffusion barrier, aluminium and gold may easily and rapidly diffuse into each other, which may be even more problematic in high temperature applications. Providing a protective gold layer on the device allows to maintain the advantages of standard CMOS processing in a device for harsh media conditions, such as an efficient volume production and a good electrical contact between the interconnect metal and sensing elements in the silicon.
It is known in the art to deposit gold onto an aluminium bondpad by electroless plating, e.g. first a layer of nickel is grown on the aluminium bondpad, followed by electroless plating of a thin gold layer. The nickel may then form a suitable diffusion barrier. However, while the layers provided on the bondpad by an electroless plating method may firmly adhere to the bondpad metal, no mechanical connection is realized between the protective layers and the passivation around the bondpad. This has the disadvantage that chemicals, such as the aforementioned chemicals that can be present in harsh media, may penetrate the interface between the passivation and the plated metals and corrode the bondpad metal.
When gold is deposited by electroplating, the seedlayer also acts as a diffusion barrier and as an adhesion layer. It is furthermore known in the art to first sputter Ti or TiW to provide an adhesion and diffusion barrier, followed by sputtering a highly conductive layer, such as gold or copper, to allow high plating currents.
However, after the electroplating of the gold on the bondpads, the seedlayer needs to be etched away to assure that no electrical connection between different structures remains, such that the edge of the seedlayer at the bottom of the gold structure is exposed to the environment, e.g. to the aforementioned corrosive chemicals in a harsh media application. It is known to apply an additional organic protection layer after etching the seedlayer to cover the exposed edge of the seedlayer. However, such protection layers may have a poor adhesion to gold, and corrosive chemicals may yet penetrate the interface between the protection layer and the gold metal.
Another disadvantage of known strategies in which the bondpads are covered with gold is that standard CMOS passivation is relied upon to protect the interconnect, e.g. the aluminium or copper interconnect. This passivation may however be insufficient to block the aforementioned corrosive chemicals. For example, particularly iodine may tend to completely remove aluminium wires when only one small defect, e.g. a small pinhole, is present in the passivation layer covering the interconnect.